Using the Analog Devices 9912 DDS as locked (beacon) LO source
(revised 16 nov 2009)
CJ 2009 presentation
1. THE AD9912
The Analog Devices AD9912 is 1
GSPS Direct Digital Synthesizer with 14-Bit DAC. This high performant
chip is the first DDS that can make high quality signals in the range
of 100MHz that can directly be used as microwave LOs. The advantages
are flexibility (no more crystals) and some new techniques are
possible, for example simple digital style FSK modulation.
article investigates the performance of the chip in an application as a
LO. Of course, the AD9912 requires a high quality clock
that is exactly on frequency and exhibits low noise.
2. SETUP OF THE BEACON
3. PHASE NOISE OF THE SETUP
This picture shows phase noise measurements at 10GHz, made on a
standard DB6NT beacon.
Equipment used: HP 11729C phase noise test set, HP 8662A low phase
noise generator no 1, HP 8568B analyzer.
Due to limitations of the test setup noise can be expected to be
underestimated at 100Hz (loop suppression).
The -10 data was taken with 10Hz LBW on the 11729C but this difficult to achieve for the free running oscillators.
See note 1. c. below for validity > 5KHz.
16/11/2009: UPDATED PHASE NOISE GRAPH USING ADF iso LMX PLL chip (see below - wide lock loop)
The XO or 9912 are generating 108,010xyz MHz.
with the standard built-in XO or G8ACE.
with AD 9912 LO clocked using 1GHz output from HP 8662A
with AD 9912 LO clocked using 1GHz output from a Crystek CRO.
AD 9912 LO clocked using 1GHz output from a locked Crystek CRO (locked
to a Symmetricom TimeSource TS3100 using an LMX2306 -- see type 2.a below).
Several observations can be made from this graph:
3. a. The built-in XO corresponds well with the measurements on a G8ACE LO
(at 10GHz, so added 20logN, 40 dB to normal numbers):
3. b. The Crystek is known to be very good further out, its
phase noise recalculated to 10GHz is:
3. c. Note that all these
sources are cleaner than our 8662a reference somewhere to the right of
5 KHz, and why everything clusters together far out, and the 8662a
source is 3db higher. The 8662a specs translate directly to the graph: good close to the carrier, but worse further off.
3. d. Spectrum on 10GHz - very clean:
These plots taken at the IF output of the 11729C so looking at 10368975Hz-16*640MHz,
the 640MHz coming from the 8662A low phase noise ref.
The spur in the last screenshot at 5khz from the carrier is 66 dB down at 10GHz.
This spur is also visible in the unaveraged PN graph above.
4. THE LOCKED 1GHz REFERENCE
By locking the reference 1GHz clock in a loop and a good quality
10MHz reference, the close-in noise should be similar or better than a
stock beacon XO whilst keeping the beacon on frequency. For example,
the cheap surplus Thunderbolts (10MHz) have -135dBc/Hz at 100Hz, or
-75dBc/Hz at 10GHz. The 9912 will kindly adhere to these numbers, just
like it does when using the 8662a as a clock source (specced at 100Hz,
-88dBc/Hz at 10GHz).
Note that if one uses the Thunderbolt * 100 to drive the DDS, the floor
at 100KHz offset on 10GHz will only be -145dBc/Hz+60=-85dbc/Hz... far
worse than the -115dBc/Hz obtained using the Crystek 1GHz resonator.
4. a. Narrow loop lock (50 Hz)
The PN graph above show the free-running and locked Crystek.
It is obvious how the beacon performance is dicated by this clock, the
exact 20logN factor being present between the beacon and the source,
both in the locked and free-running case. I used the xlock as a locking circuit, this time with an LMX2326 chip.
4. b. Wide loop lock (1 kHz - 11/2009) -- ADF4107 versus LMX2326
should be possible to improve the results by locking in a wider loop -
say 1 kHz. The Thunderbolt has about -145 dBc/Hz on 10Mhz... -105
dBc/Hz on 1GHz.... so that seems the right point to transfer control
from the reference to the VCO. But to do this we need a chip that is
about 20 dB better in the phase noise department than the LMX2316.
Current simulations and measurements come up around -84 dBc/Hz at
1kHz for the LMX2316... Not good enough. The ADF411x masks are better
(about 9 dB) but still lacking. However these have an additional
advantage to run at R=1. The LMX2316 requires R=8 in this case
(R>=3, and the A/B relationship). So here is another factor 8 to be
gained. We can expect and ADF4112 to perform 18dB better (in this case
only). A more modern chip like the ADF4107 can squeeze out another 3 dB...
with a carefully designed the oscillator numbers should not be deteriorated by the PLL.
Here are the results of the ADF4107 performance on 1GHz.
And the comparison on 10GHz:
with the standard built-in XO or G8ACE.
with AD 9912 LO clocked using 1GHz output from the CRO in ADF locked clock (loop 150 Hz).
with AD 9912 LO clocked using 1GHz output from CRO in LMX locked clock (loop 50 Hz)
AD 9912 LO clocked using 1GHz output from CRO in LMX locked clock (loop 1 kHz).
As expected from the clock performance, even with a wide loop, the ADF
setup can stay close to xtal performance - this results in good PN
performance both at 1KHz and
close the carrier (<= 100Hz), where the ref dominates. Also note
that in this graph the measurement loop bandwidth of the 11729C was
100Hz for the LMX and 10Hz for the G8ACE and ADF setups. So the actual
LMX numbers at 100Hz are a bit worse.
The numbers are in close alignment with smulations except within the
loop, where it should be possible to gain another 10 dB based on
Thunderbolt specs. This needs to be investigated.
purposes, the AD9912 can be used without problems as a beacon
is no significant PN difference. Coming up with a high-quality - cheap
1GHz clock that can be locked to a reference is not easy. The locked
Crystek goes a long way towards this, but very good PLL chips are needed
at high loop bandwidths. In terms of audio tone, the locked DDS beacon
sounds fine. At -87 dBc/Hz at 10GHz, this should work well up to 78GHz or even 122GHz.